![]() Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.) Iyer Dennis Sinitsky Current Assignee (The listed assignees may be inaccurate. Crowder Ramachandra Divakaruni Subramanian S. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.) Expired - Lifetime Application number US09/427,506 Inventor Paul D. #TITANIUM TOAST 11 DOUBLE LAYER LAYER BREAK PDF#Google Patents Double polysilicon process for providing single chip high performance logic and compact embedded memory structureÄownload PDF Info Publication number US6287913B1 US6287913B1 US09/427,506 US42750699A US6287913B1 US 6287913 B1 US6287913 B1 US 6287913B1 US 42750699 A US42750699 A US 42750699A US 6287913 B1 US6287913 B1 US 6287913B1 Authority US United States Prior art keywords logic memory region layer over Prior art date Legal status (The legal status is an assumption and is not a legal conclusion. Google Patents US6287913B1 - Double polysilicon process for providing single chip high performance logic and compact embedded memory structure US6287913B1 - Double polysilicon process for providing single chip high performance logic and compact embedded memory structure
0 Comments
Leave a Reply. |
AuthorWrite something about yourself. No need to be fancy, just an overview. ArchivesCategories |